WATCHDOG IP

Overview

COMPETITIVE ADVANTAGE

The SivaKali Tech WATCHDOG IP is a highly reliable, silicon-proven IP core designed for high-performance system integration. Engineered to meet strict industry compliance standards, this core offers exceptional flexibility and ease of integration into both ASIC and FPGA designs. The backbone of system control and peripheral connectivity for any SoC. Validated on leading FPGA platforms and foundry nodes, it provides a low-risk, time-to-market advantage for developers.

COMPETITIVE ADVANTAGE

Ultra-Low Gate Count: Extremely efficient implementation, negligible impact on total SoC area.

Simple Integration: Standard AMBA (APB/AHB) or AXI-Lite interfaces for plug-and-play system connectivity.

Proven Reliability: Thousands of production deployments ensuring rock-solid stability.

Driver Support: Includes bare-metal and Linux drivers to accelerate software development.

FEATURES

Supports to prevent system lock up due to software anomalies or hardware failure
Supports cold reset after configured interval
Supports interrupt indication after programmed time period
Supports both firmware and hardware pause and resume
Supports to restart watchdog timer via software interface
Supports 32 bit counter to count a maximum value of 32’hFFFFFFFF Automatically reload value support
Supports to hold count value
Supports enabling and disabling of interrupts
Fully synthesizable
Static synchronous design
Positive edge clocking and no internal tri-states
Scan test ready
Simple host interfaces enable straightforward integration with microcontrollers and application processors

FUNCTIONAL DESCRIPTION

CORE: Core module interconnects all the sub-modules in the Watchdog IP. Ports of core module are the top level ports for the Watchdog IP.

CSR: CSR module has all the control and status registers required for Watchdog operation.

PRESCALER: Prescaler module is used to divide the system clock based on the given prescaler value to derive the clock enable for watchdog .

ASIC AND FPGA IMPLEMENTATION

ASIC Technology	Logic Resources	System Clock Frequency
TSMC 28nm	1.32K	100MHz
TSMC 180nm	1.98k	100MHz
TSMC 130nm	1.90k	100MHz
TSMC 90nm	1.90k	100MHz
GF 180nm	1.49k	100MHz
SMIC 40nm	1.38k	100MHz
UMC 55nm	2.57k	100MHz

FPGA Device and Family	Logic Resources	Clock Frequency
AMD-xcvu9p-flga2104-2L-e	51685 LUT's	100MHz

LICENSING OPTIONS

Single Site license for regional development teams.
Multi-Site license for global corporate deployments.
Single Design license for specific project cost-efficiency.
Unlimited Design license for high-volume product roadmaps.

DELIVERABLES

Complete Verilog/VHDL/SystemC Source Code.
UVM-compliant verification environment with a comprehensive test suite.
Production-ready synthesis, Lint, and CDC scripts.
IP-XACT RDL generated address maps.
Standard-compliant firmware and Linux/C driver packages.
Detailed documentation: User Guides, Release Notes, and ISO 26262 Safety Manual (SAM)/FMEDA.