CORE: Core module interconnects all the sub-modules in the Ethernet PTP 1588 IP. Ports of core module are the top level ports for the Ethernet PTP 1588 IP.
TX CTRL: Transmit Control block processes the data from system interface/AXI-interfaces and push the data into Transmit FIFO.
TX ASYNC FIFO: TX ASYNC FIFO module stores TX data and processes it with the different read and write clock domain.
Tx Arbiter: It Arbits the Ethernet frames with and without PTP messages based on the availability.
PTP ASYNC FIFO: PTP ASYNC FIFO module stores Tx data and process the data with the different read and write clock domain.
Tx Mux: TX MUX is used to transmit the Ethernet frames with and without PTP messages based on TX arbiter.
RTC: Real time counter works by increment the nanoseconds and seconds counter acccording to the time period.
Tx Timestamp Unit: This module captures the time from the counters when any of the PTP event or general messages transmit from MAC TX.
Rx Timestamp Unit: This module captures the time from the counters when any of the PTP event or general messages Received at the MAC RX.
PTP Encoder: The PTP Encoder generate PTP Request/Response messages based on the reception of respecitve messages such as Sync/follow up.
PTP Control: PTP control the Transmit MAC to initiate Delay Response message with the timestamp on which Delay Request message was received by MAC.
PTP Decoder: PTP Decoder process the PTP frames based on type length field matches with PTP type (16’h88F7).
Rx ASYNC FIFO: RX ASYNC FIFO module stores Rx data and process the data with the different read and write clock domain.
Transmit MAC: The transmit FSM receives the data from MAC client and maps them to the MAC 1G Interface by encapsulating the Ethernet packet and frame headers.
FLOW CTRL: Initiating the Transmission of pause frame-based on the Receive FIFO's threshold or External requests.
PAUSE TIMER: Implements the Pause timer logic based on the Pause Quanta Value.
BACKOFF: This block contains the time limit for which Tx MAC waits before subsequent retransmission in case of collision in Half Duplex Module.
RX CTRL: RX Control block processes the data from MAC 1G interface and push the data into Rx ASYNC FIFO.
Receive MAC: The Receive FSM receives the data from underlying physical layer and sends them to MAC client by decapsulating the Ethernet Packet headers.
MDIO: MDIO module is used to connect a management entity and a managed PHY for the purpose of controlling the PHY and gathering status from the PHY.
CSR: CSR Module has all the configurable registers. The contents of the registers are decoded and assigned to its respective output ports based on its functionality.
