The SivaKali Tech MICROWIRE CONTROLLER IIP is a highly reliable, silicon-proven IP core designed for high-performance system integration. Engineered to meet strict industry compliance standards, this core offers exceptional flexibility and ease of integration into both ASIC and FPGA designs. Professional grade IP core for embedded system design. Validated on leading FPGA platforms and foundry nodes, it provides a low-risk, time-to-market advantage for developers.
COMPETITIVE ADVANTAGE
Production Proven: Validated in silicon and FPGA across diverse applications.
Cost Efficient: Competitive licensing models designed to lower the barrier to entry for custom silicon.
Expert Support: Direct access to senior design engineers for rapid integration assistance.
Flexible Deliverables: Available as synthesizable source code or optimized netlists.
FEATURES
Implemented in Unencrypted Verilog, VHDL and SystemC.
Supports configurable address width from 2 to 32bit.
Supports configurable data width from 2 to 64bit.
Support Master and Slave Mode.
Supports 3-wire interface Support baud rate selection.
Support internal clock division check.
Support single and burst transfer mode.
Support on the fly generation of data.
Support Fairchild, Microchip, Onsemi, ST EEPROM using microwire.
Built in functional coverage analysis.
Fully synthesizable.
Static synchronous design.
Positive edge clocking and no internal tri-states.
Scan test ready.
Simple host interfaces enable straightforward integration with microcontrollers and application processors.
FUNCTIONAL DESCRIPTION
CORE: Core module interconnects all the sub-modules in the MICROWIRE IP. Ports of core module are the top level ports for the MICROWIRE IP.
CSR : CSR module holds control, status, interrupt, configuration registers for the Microwire IP which can be accessed via AMBA/Custom interface.
FSM : FSM module is responsible for driving data to and from the bus.
ASIC AND FPGA IMPLEMENTATION
ASIC Technology
Logic Resources
System Clock Frequency
Serial Clock Frequency
TSMC 28nm
28.28K
100MHz
50MHz
UMSC 55nm
28.28K
100MHz
50MHz
SMIC 40nm
28.28K
100MHz
50MHz
FPGA Device and Family
Logic Resources
System Clock Frequency
Serial Clock frequency
AMD virtula ultrascale
51685 LUT's
100MHz
50MHz
LICENSING OPTIONS
Single Site license for regional development teams.
Multi-Site license for global corporate deployments.
Single Design license for specific project cost-efficiency.
Unlimited Design license for high-volume product roadmaps.
DELIVERABLES
Complete Verilog/VHDL/SystemC Source Code.
UVM-compliant verification environment with a comprehensive test suite.
Production-ready synthesis, Lint, and CDC scripts.
IP-XACT RDL generated address maps.
Standard-compliant firmware and Linux/C driver packages.
Detailed documentation: User Guides, Release Notes, and ISO 26262 Safety Manual (SAM)/FMEDA.
